Micro electromechanical systems (MEMS), both sensors and actuators, are becoming increasingly important. Sensors like silicon pressure sensors, silicon, accelerometers and silicon flow sensors are elements of important industrial production. Within the area of actuators, ink jet nozzles, fuel injection nozzles and micropumps built from single crystal silicon are now available. More products are currently under development and are being introduced, including complete microsystems with sensors, actuators and electronics on the same silicon chip. An overview of methods for micromachining of three-dimensional structures in silicon is given in a textbook written by M. Madou “Fundamentals of Microfabrication”, CRC Press, 1997.
In order to produce Microsystems such as sensors and actuators at low cost it is necessary to be able to package such systems effectively. Various packaging techniques are currently known in the art, but many of them lack reliability and may not achieve a quality seal during the bonding process. Indeed, where appropriate quality is found in packaging systems of the prior art it is associated with increased complexity which, in turn, causes these manufacturing techniques to be expensive.
One such technique uses anodic bonding. However, anodic bonding of sodium borosilicate glass encasing wafers and CMOS or BiCMOS wafers is known to result in problems related to the large electric fields present during the bonding process. In addition, there are problems with this particular example regarding sodium contamination as a result of the bonding process.
Furthermore, on highly pre-processed silicon wafers, uncovered silicon is normally not available for anodic bonding due to issues like contamination control, circuit integrity and limitations with respect to the implementation of electrical feedthroughs. Anodic bonding may, therefore, have to be performed to other materials than the bulk silicon.
Anodic bonding of glass to a thin poly-silicon film is presented by K. Yamada et. al. In U.S. Pat. No. 4,291,293. A passivation layer is present between the single crystal silicon surface and the thin poly-silicon film in the sealing area. However, there are certain limitations to this technique.
One technological problem with anodic bonding to a poly-silicon surface is the difficulty of avoiding diffusion of mobile ions from the glass along grain boundaries in the poly-silicon film into the passivating film at the bonding temperature. Sodium contamination may cause electrical instability and reliability problems. Ionic contamination in the passivation over PN-junctions may not only lead to reduction in break-down voltages and cause leakage currents, but may also cause N-type inversion layers to be formed on lightly doped P-type areas between doped N-areas that should be insulated from each other. Such effects are well known.
A second technological problem with anodic bonding to a poly-silicon surface is the high surface roughness of the poly-silicon film. Attempts have been made to overcome the problems related to surface roughness by the use of chemical mechanical polishing (CMP) of the poly-silicon surface before bonding as demonstrated by A. V. Chavan and K. D. Wise: “A monolithic fully-integrated vacuum-sealed CMOS pressure sensor”, Proceedings of the IEEE Thirteenth Annual International Conference on Micro Electro Mechanical Systems, 2000, pp 341–346. However, such techniques merely further increase the complexity of the manufacturing process.
It is necessary to maintain an electrical conduction path between the system being packaged and an external contact. One method for providing such an electrical conduction path through anodically bonded and hermetically sealed areas is described in EP-A-0742581 where such conducting feed throughs are provided by the use of doped buried crossings in the single crystal silicon wafer. However, there are problems associated with this method, such as the attainable sheet resistance of the buried conductors, the stray capacitance related to the depletion region surrounding the buried conductors, the polarity and temperature limitations of using PN-junction isolation and the incompatibility with some CMOS and BiCMOS processes. This means that the process cannot be used for all types of device and has limitation.